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| Ordering number : EN *5651 Bi-CMOS LSI LV2700V Spread Spectrum Communications IC Preliminary Overview The LV2700V provides the reception and transmission functions necessary for half-duplex communication in spread-spectrum communications systems. * Band limiting filter (LPF) for data transmission [RX Block] * Spectrum despreader * Synchronization supplementation and protection * 236-MHz PLL * PN code generator (M sequence) * M sequence code length (31 or 63 chips) and tap switching * FSK (FM) demodulator * Lock detector Features * Frequency conversion is not required. (direct signal processing at 236 MHz) * Wide spread-spectrum bandwidth (20 MHz) * Sanyo developed system for PN code synchronization * Allows direct primary modulation (FSK and FM) by data and analog signals. (Maximum data rate: 150 kbps) * Low-voltage operation (2.7 to 5.5 V) * Low power dissipation (36 mW in RX mode) Package Dimensions [LV2700V] Functions [TX Block] * Spectrum spreader * Crystal oscillator circuit * PN code generator (M sequence) * M sequence code length (31 or 63 chips) and tap switching * 9.83 MHz PLL SANYO: SSOP30 Specifications Maximum Ratings at Ta = 25C Parameter Maximum supply voltage Allowable power dissipation Operating temperature Storage temperature Symbol VCC max Pd max Topr Tstg Conditions Ratings 6 150 -20 to +75 -40 to +125 Unit V mW C C Operating Conditions at Ta = 25C Parameter Recommended supply voltage Allowable voltage range Symbol VCC VCCop Conditions Ratings 3 2.7 to 5.5 Unit V V SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110 JAPAN 63097HA(OT) No. 5651-1/9 LV2700V Electrical Characteristics at Ta = 25C, VCC = 3 V, fc = 236 MHz, fm = 10 kHz, Vm = 0.2 Vp-p Parameter Symbol ICCOTX ICCORX VOTX VOTX WS TXVCC + VDD RFVCC + RXVCC + VDD TXDATAOUT, f = 10 kHz TXREOUT TXRFOUT Conditions Ratings min typ 8 12 max 11 16 Unit mA mA Quiescent current [TX Block] Modulated signal voltage RF output voltage Spread bandwidth [RX Block] Input sensitivity High level Demodulated output 1 Demodulated output 1 Total harmonic distortion Signal-to-noise ratio [CMOS-Level Interface] Input high-level voltage Input low-level voltage Output high-level voltage Output low-level voltage Input high-level current Input low-level current Input amplitude Crystal oscillator frequency conditions Input capacitance Low level 0.2 -35 19.7 Vp-p dBm MHz VSRX VORX1H VORX1L VORX2 THD RX S/N RFIN RXOUT RXOUT Pin 10 output w/o CEXT Pin 10 output w/o CEXT Pin 10 output w/o CEXT 45 240 300 0.5 55 2.5 -75 dBm V 0.4 V mVrms 2 % dB VIH VIL VO H VOL IIH IIL VIN XOSC CIN Pins 11 to 15, 17 Pins 11 to 15, 17 Pins 8, 9 Pins 8, 9 Pins 11 to 15, 17 Pins 11 to 15, 17 VCOIN XIN, XOUT RFIN, XIN, VCOIN 2.1 0.6 2.5 0.4 5 5 -16 5 2.5 13 V V V V A A dBm MHz pF No. 5651-2/9 Block Diagram LV2700V Synchronization control Strong field detector No. 5651-3/9 LV2700V Pin Functions Pin No. 1 Pin RFVCC Pin voltage(V) Pin function RF block power supply Equivalent circuit 2 REXT 0.2 Connection for the external capacitor and resistor used by the internal RF amplifier 3 RFIN 1 RF input 4 RFGND RF block ground 5 ANTDUMP 1.2 Output for the DC voltage used under strong reception conditions to prevent saturation of the RF amplifier. Voltage variability range: about 0.5 V 6 RXVCC Reception block power supply 7 BIASIN DC bias voltage for the demodulation signal processing block (LPF, amplifier, limiter) 8 RXOUT Demodulated data output (This is an open drain output.) 9 LOCK DET Outputs a high level when PN code synchronization is established. (This is a CMOS-level output.) 10 CEXT Same as V7 Amplifier output for demodulated output. The pin 8 output data is made valid by connecting a capacitor between this pin and ground. Continued on next page. No. 5651-4/9 LV2700V Continued from preceding page. Pin No. Pin Pin voltage(V) Pin function Turns the optimal PN code synchronization control on or off. Control is turned on by a high level input. Equivalent circuit 11 CTRL 12 PNT1 Tap selection for the PN code (M sequence) Tap selection for the PN code (M sequence). These pins select one of three code types. PNT1 0 13 PNT2 0 1 1 0 = Low 1 = High PNT2 0 1 0 1 PN code CODE1 CODE2 CODE3 14 PNL PN code length selection High: 63 chips Low: 31 chips Send/receive mode selection. High: Transmission Low: Reception CMOS block power supply Transmission data input (CMOS levels). Do not apply analog signals to this pin. 15 TX/RX 16 VDD 17 TX DATAIN 1.7 18 TX DATAOUT 0.7 1Vp-p Transmission data output. The output signal is band limited to 300 kHz and voltage limited to 1 Vp-p. CMOS block ground 19 20 DGND XIN 1/2VCC Input for the 9.8304 MHz reference oscillator inverter. Output for the 9.8304 MHz reference oscillator inverter. Add a resistor of about 1 M between XIN and XOUT. 21 XOUT 1/2VCC A06924 22 TXLPF 1.5 Connection for the 9.8-MHz PLL loop filter used in transmission. Continued on next page. No. 5651-5/9 LV2700V Continued from preceding page. Pin No. Pin Pin voltage(V) Pin function Equivalent circuit 23 LPFIN Same as V7 Demodulated signal input (loop filter output) used in reception. 24 RXPDOUT Same as V25 Pin 25 buffer output. Connect an external lowpass filter between pins 23 and 24 if required. 25 RXLPF 1.5 Connection for the 236-MHz PLL loop filter used in reception. 26 LPFOUT 1.5 Control input for the 236-MHz VCO. The LV2700V includes a switch for selecting the loop filter depending on the mode (transmission or reception). 27 TX VCC Transmission power supply 28 VCOIN 1/2 VCC Input for the output from the 236-MHz VCO. Minimum input level: about -20 dBm 29 AGND Analog system ground Spectrum spreader 30 TX RFOUT 1.3 Spread-spectrum RF output (in transmission mode) No. 5651-6/9 LV2700V Circuit Operation and Usage Notes 1. RF amplifier block The LV2700V includes an on-chip RF amplifier that provides a gain of about 15 dB. An input sensitivity of about -100 dBm can be acquired by adding an external 25-dB RF amplifier. Since IF frequency conversion is not used, a costly IF filter is not required. While the frequencies used are selected to be values relatively infrequently used in the weak field range (under 320 MHz), out of band components must be excluded using a bandpass filter after the antenna to improve both the interference rejection characteristics and the input sensitivity. 2. 236-MHz VCO * The external 236-MHz VCO operates as follows in transmission and reception modes [TX mode] The VCO is adjusted to 236 MHz by a PLL circuit based on the 9.8304 reference. That is, the phases of the VCO output that is input to pin 28 and the signal created by dividing the 9.8304 MHz reference oscillator output by 24 are compared and edge-type phase detector. The error signal is integrated by the pin 22 loop filter and fed back through pin 26 to the VCO control input. [RX mode] The spread spectrum RF signal input to pin 3 is amplified by 15 dB and a narrow band signal is recovered by a despreader circuit. The PLL circuit is then used for FM detection. That is, the phases of that signal and the VCO output from pin 28 are compared, and the error signal is integrated by the pin 25 loop filter and fed back through pin 26 to the VCO control input. An FM detected demodulated signal can be acquired from pin 25 at this time. * Main characteristics -- For half-duplex communication, a VCO circuit using a SAW resonator is used for both transmission and reception. Control sensitivity: 0.7 to 1.5 MHz/V Frequency range: 236 MHz 2 MHz SAW resonator: We recommend the SAW resonators manufactured by Murata Mfg. Co., Ltd. (with a series resonance frequency error of 500 ppm). See the VCO circuit on page 8 for the recommended circuit, which is a Colpitts oscillator circuit. -- For unidirectional communication, an LC circuit based VCO may be used for the transmission side. -- The reception PLL circuit lock time is between 2 and 10 ms when power is first applied and between 0.5 and 1.0 ms after a transition from no input to the input present state. 3. FSK (FM) modulation technique Modulation frequency range: 200 Hz to 150 kHz When a modulated signal is applied to pin 22, there are limitations on low band FSK (FM) modulation, since this is equivalent to applying the modulation as a disturbance signal to the PLL circuit. If it is necessary to apply modulation to even lower bands, the 9.8 MHz reference oscillator circuit should be modified to be a VCXO circuit. [For data input] Apply the input data to pin 17. The signal is band limited to 300-kHz and then voltage limited to 1 Vp-p and output from pin 18. This signal is passed through a series RC circuit and connected to pin 22. The capacitor is a DC-cut capacitor of about 1 F. The resistor should be about 20 k, and is used for modulation adjustment. [For analog signal input] Do not use the internal 300-kHz low-pass filter and limiting amplifier, but rather apply the signal through the RC circuit to pin 22 directly. When the resistor is 20 k, the optimal signal input level will be about 0.3 Vp-p. 4. Notes on the FSK (FM) demodulated signal [For data output] Connect a capacitor of about 0.1 F between pins 23 and 24, and another 1 F capacitor between pin 10 and ground. This will allow a CMOS-level data output signal to be acquired from pin 8. [For analog output] An analog signal can be acquired from pin 10. In this case, do not insert a capacitor between pin 10 and ground. The cutoff frequency of the internal 150-kHz low-pass filter is set somewhat high for two reasons: to prevent PN code leakage and to limit attenuation of high-speed data as much as possible. As a result, this filter is inadequate for No. 5651-7/9 LV2700V reducing upper harmonic, high band, and other noise in audio signals. The LV2700V is designed so that good quality audio signals can be acquired by connecting an external filter between pins 23 and 24. The pin 24 output includes a buffer amplifier, thus making it a low-impedance output so that this output does not influence the pin 25 loop filter. 5. Pin 7 The DC bias of the amplifier that is connected after the 150-kHz low-pass filter is set with an external resistor. Select a value for this resistor so that V7 will be 1.2 volts when VCC is 3 volts. 6. Lock detection The LOCK DET pin (a CMOS-level output) goes high when PN code synchronization is detected. This output can be used as a simple technique for determining whether or not a carrier is present. 7. The ANTDUMP pin (pin 5) This pin outputs a DC level proportional to the RF input level. However, since this level is proportional to the input dBm value, it is not appropriate for use as an S-meter signal. It indicates voltage changes that are only meaningful in strong field reception conditions. It can be used to prevent saturation of the front end RF amplifier. However, the voltage change is +0.5 volt. (The pin 5 voltage for low input levels will be about 1.2 V.) 8. Power supply voltage application [TX mode] Provide the power-supply voltage to all the power-supply pins TXVCC, RFVCC, RXVCC, and VDD. Power saving is applied to the RF block bias internally. [RX mode] Provide the power-supply voltage to the RFVCC, RXVCC, and VDD pin. TXVCC must be left open. 9. When changing the RF frequency from 236 MHz There are cases, for example due to considerations related to the SAW resonator characteristics, where it may be desirable to construct a system using a frequency other than 236 MHz. A 236-MHz AM synchronization detection output is used for PN code synchronization control. Since an RC circuit is used for the VCO output 90 phase shift circuit for this AM synchronization detection, it may not be possible to acquire the stipulated phase difference if the frequency is moved significantly far from 236 MHz. Assuming that a range of 455 is allowed, the corresponding frequency range will be 200 to 280 MHz. Characteristics 236-MHz VCO Control Characteristics 236-MHz VCO control characteristics Oscillator frequency (MHz) Vt (V) No. 5651-8/9 LV2700V VCO Circuit Transistor: 2SC5245 Use an inductor with a value of 84 nH 2% for the series inductor L. An LC oscillator circuit may be used for the transmission side VCO for unidirectional communications systems. s No products described or contained herein are intended for use in surgical implants, life-support systems, aerospace equipment, nuclear power control systems, vehicles, disaster/crime-prevention equipment and the like, the failure of which may directly or indirectly cause injury, death or property loss. s Anyone purchasing any products described or contained herein for an above-mentioned use shall: Accept full responsibility and indemnify and defend SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors and all their officers and employees, jointly and severally, against any and all claims and litigation and all damages, cost and expenses associated with such use: Not impose any responsibility for any fault or negligence which may be cited in any such claim or litigation on SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors or any of their officers and employees jointly or severally. s Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties. This catalog provides information as of June, 1997. Specifications and information herein are subject to change without notice. No. 5651-9/9 |
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